Semiconductor Test Board
Meeting wafer-level packaging and testing requirements with micron-level precision circuit manufacturing.
Probe Card PCB
Core interface board for wafer testing
30-LayerHTG FR46.35mm Thickness0.6mm Min HoleENIG
Wafer TestingPackage Testing
Substrate-Like PCB (SLP)
Modified semi-additive process, fine lines
≤15μm Line WidthmSAP ProcessHigh-Density InterconnectFlat SurfaceENEPIG
Advanced PackagingIC Substrates
Glass Substrate (TGV)
Next-generation substrate technology for the future
Through Glass ViaRDL 5μmHigh FlatnessLow CTEMicron-Level Lines
Advanced PackagingOptoelectronic Integration
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